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Verilator

| nosplit | ↑ parent "Verilog" | words: 24

↑ parent "Verilog" | nosplit | ⇓ toc | words: 24

Verilog simulator that transpiles to C++.

Ancestors

Verilog | 0, 24, 1
Register transfer level | 190, 218, 6
Computer hardware | 0, 2k, 81
Computer | 139, 39k, 807
Information technology | 0, 39k, 819
Technology | 0, 59k, 1k
Ciro Santilli's Homepage | 264, 256k, 5k

Incoming links

How computers work? | 1k