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Register transfer level (RTL)

| 🗖 nosplit | ↑ parent "Computer hardware" | words: 190 | descendant words: 194 | descendants: 5
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Register transfer level is the abstraction level at which computer chips are mostly designed.
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The only two truly relevant RTL languages as of 2020 are: Verilog and VHDL. Everything else compiles to those, because that's all that EDA vendosr support.
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Much like a C compiler abstracts away the CPU assembly to:
  • increase portability across ISAs
  • do optimizations that programmers can't feasibly do without going crazy
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Compilers for RTL languages such as Verilog and VHDL abstract away the details of the specific semiconductor technology used for those exact same reasons.
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The compilers essentially compile the RTL languages into a standard cell library.
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Examples of companies that work at this level include:
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Ancestors

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