37.6. Caches
https://courses.cs.washington.edu/courses/cse378/09wi/lectures/lec15.pdf contains some of the first pictures you should see.
In a direct-mapped cache architecture (every address has a single possible block), a memory address can be broken up into:
+-----+-------+--------------+ | | | | full address +-----+-------+--------------+ | | | | | tag | index | block offset |
where:
-
index: determines in which block the address will go. This is the "index/ID of the block" it will go into!
-
tag: allows us to differentiate between multiple addresses that have the same index
We really want tag to be the higher bits, so that consecutive blocks may be placed in the cache at once.
-
block offset: address withing the cache. Not used to find caches at all! Only used to find the data within the cache line
If the cache is set associative, we just simply make the index smaller and add a bits to the tag.
For example, for a 2-way associative cache, we remove on bit from the index, and add it to the tag.