30.6.3.3. ARMv8 aarch64 LD2 instruction
Example: userland/arch/aarch64/ld2.S
We can load multiple vectors interleaved from memory in one single instruction!
This is why the ldN instructions take an argument list denoted by {} for the registers, much like armv7 ARM LDMIA instruction.
There are analogous LD3 and LD4 instruction.