30.6.3. ARMv8 AArch64 floating point registers
TODO example.
ARMv8 architecture reference manual B1.2.1 "Registers in AArch64 state" describes the registers:
32 SIMD&FP registers, V0 to V31. Each register can be accessed as:
A 128-bit register named Q0 to Q31.
A 64-bit register named D0 to D31.
A 32-bit register named S0 to S31.
A 16-bit register named H0 to H31.
An 8-bit register named B0 to B31.
Notice how Sn is very different between v7 ARM VFP registers and v8! In v7 it goes across Dn, and in v8 inside each Dn:
128 64 32 16 8 0
+---------------------------+-------------------+-------+---+---+
| Vn |
+---------------------------------------------------------------+
| Qn |
+---------------------------+-----------------------------------+
| Dn |
+-----------------------------------+
| Sn |
+---------------+
| Hn |
+-------+
|Bn |
+---+