24.22.4.1.4. gem5 se.py page translation

Happens on EmulationPageTable, and seems to happen atomically without making any extra memory requests.

TODO confirm from code, notably by seeing where the translation table is set.

But we can confirm with logging with:

--trace DRAM,ExecAll,FmtFlag

which gives

      0: DRAM: system.mem_ctrls: recvAtomic: ReadReq 0x78
      0: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue    :   movz   x0, #1, #0        : IntAlu :  D=0x0000000000000001  flags=(IsInteger)
    500: DRAM: system.mem_ctrls: recvAtomic: ReadReq 0x7c
    500: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue+4    :   adr   x1, #28            : IntAlu :  D=0x0000000000400098  flags=(IsInteger)
   1000: DRAM: system.mem_ctrls: recvAtomic: ReadReq 0x80
   1000: DRAM: system.mem_ctrls: recvAtomic: ReadReq 0xa0
   1000: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue+8    :   ldr   w2, #4194464       : MemRead :  D=0x0000000000000006 A=0x4000a0  flags=(IsInteger|IsMemRef|IsLoad)
   1500: DRAM: system.mem_ctrls: recvAtomic: ReadReq 0x84
   1500: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue+12    :   movz   x8, #64, #0       : IntAlu :  D=0x0000000000000040  flags=(IsInteger)
   2000: DRAM: system.mem_ctrls: recvAtomic: ReadReq 0x88
   2000: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue+16    :   svc   #0x0               : IntAlu :   flags=(IsSerializeAfter|IsNonSpeculative|IsSyscall)
hello
   2500: DRAM: system.mem_ctrls: recvAtomic: ReadReq 0x8c
   2500: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue+20    :   movz   x0, #0, #0        : IntAlu :  D=0x0000000000000000  flags=(IsInteger)
   3000: DRAM: system.mem_ctrls: recvAtomic: ReadReq 0x90
   3000: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue+24    :   movz   x8, #93, #0       : IntAlu :  D=0x000000000000005d  flags=(IsInteger)
   3500: DRAM: system.mem_ctrls: recvAtomic: ReadReq 0x94
   3500: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue+28    :   svc   #0x0               : IntAlu :   flags=(IsSerializeAfter|IsNonSpeculative|IsSyscall)
Exiting @ tick 3500 because exiting with last active thread context
   3500: DRAM: system.mem_ctrls_0: Computing stats due to a dump callback
   3500: DRAM: system.mem_ctrls_1: Computing stats due to a dump callback

So we see that before every instruction execution there was a DRAM event! Also, each read happens 4 bytes after the previous one, which is consistent with instruction fetches.

The DRAM addresses are very close to zero e.g. 0x78 for the first instruction, and therefore we guess that they are physical since the ELF entry point is much higher:

./run-toolchain --arch aarch64 readelf -- -h "$(./getvar --arch aarch64 userland_build_dir)/arch/aarch64/freestanding/linux/hello.out

at:

  Entry point address:               0x400078

For LDR, we see that there was an extra DRAM read as well after the fetch read, as expected.

Tested in gem5 b4879ae5b0b6644e6836b0881e4da05c64a6550d.