30.3.1.2. ARM addressing modes

Load and store instructions can update the source register with the following modes:

  • offset: add an offset, don’t change the address register. Notation:

    ldr r1, [r0, 4]
  • pre-indexed: change the address register, and then use it modified. Notation:

    ldr r1, [r0, 4]!
  • post-indexed: use the address register unmodified, and then modify it. Notation:

    ldr r1, [r0], 4

The offset itself can come from the following sources:

  • immediate

  • register

  • scaled register: left shift the register and use that as an offset

The indexed modes are convenient to loop over arrays.

  • A4.6.5 "Addressing modes"

  • A8.5 "Memory accesses"

ARMv8 architecture reference manual: C1.3.3 "Load/Store addressing modes"